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ID Date Author Type Subject
  1   Tue Apr 19 19:09:25 2016 James BynesInstructionsObtaining data from XRM development boardstack
Here are the instructions to obtain data from XRM boardstack. This has currently been tested with 1 carrier board, but little modifications will allow multiple boards. Currently the data
taken is raw data, a pedestal extractor is currently under works.
The current firmware and software branch can be accessible from the svn repo at: https://www.phys.hawaii.edu/repos/belle2/itop/electronics/branches/XRM
**note** The firmware and software bundle can also be temporarily downloaded from Google Drive: https://drive.google.com/file/d/0B7Z8jduXUZ-LbFdUTFdEMkctUnc/view?usp=sharing
**note** Software bundle does not include XRM parser, please download from this ELOG.
**note** The following instructions are written using the directory for the test setup at IDLAB. Please modify the upcoming directories to match your system.

If any questions, please email James (bynes@hawaii.edu) or Luca (lucam@hawaii.edu)

Preliminary Step (setting up the network):
The firmware has been setup to communicate with a workstation using point-to-point topologies.
First, connect a SFP module from the SCROD to a media converter, then connect the Ethernet cable to your workstation.
Workstation IP
Next, we setup the test workstation (at IDLAB) using a static IP address, this machine ran Scientific Linux (red hat variant)
From red hat linux this can be done like so...
Menu System >> Administration >> Network
Statically set IP address:
Address 192.168.10.200
Subnet mask 255.255.255.0
SCROD firmware IP
The firmware is currently set to use IP address 192.168.10.***
where the last 3 digits is the ID of the SCROD. This IP will come in handy when launching the communication GUI.

Step 1 (program FPGA):
First need to source Xilinx settings, if your .bashrc doesn’t already do so.
Directory: /opt/Xilinx/Vivado/2014.4/
Change to c shell, type ‘csh’ in terminal
Source settings64.csh
Directory: /home/idlab/svn-02-18-2016/gigE
Upload bitfiles to FPGAs on chain ‘xmd -tcl program-bit-and-elf-and-go.xmd.tcl’

Step 2 (run GUI):
Directory: /home/idlab/svn-02-18-2016/gigE/software/gigE/
Source setup_env_template.csh
Now run GUI: ‘bin/develTest 192.168.10.101’
**Note** 101 is the SCROD board ID, this should be on the SCROD itself on a whitish label.
To test whether or not link to SCROD is up, from configuration tab on GUI, click “Read Configuration” button on the bottom

Step 3 (configuration):
Next, the configuration script will need to be ran
Directory: /home/idlab/svn-02-18-2016/gigE/software/gigE/pnnl
Run configuration script: './configure_boardstack.csh'
...
In the GUI, will also need to manually configure some settings.
From the Configuration tab, change the following fields to the parameters:
trigMask -> 0xe
featureExtractionMode -> Passthrough
After these two parameters are changed, hit the “Write Configuration” button on the bottom.

Step 4 (pull data):
This current script will take data from carrier 0 (includes all 4 ASICs).
Directory: /home/idlab/svn-02-18-2016/gigE/software/gigE/pnnl/
Run current test script: ‘./runtest.csh’
The binary file will be outputted to data/test_c0_1.bin

Step 5 (parse data):
XRMdataExtractor.c will convert binary data pulled from previous step and output to a readable format. It is attached to this elog
Use: ./XRMdataExtractor <binary_file>
Output files: XRM_header_from_binary_file.txt, XRM_data_from_binary_file.txt
The header file shows format of data file which is as follows:
carrier# | ASIC# | Sample# | CH0 | CH1 | CH2 | CH3 | CH4 | CH5 | CH6 | CH7

Upcoming additions:
XRMpedExtractor
XRMdataVisualizer
  2   Sun May 1 01:45:45 2016 James BynesInstructionsSetting up Ubuntu 14.04 to take data from XRM boardstack
This ELOG shows how to obtain data from XRM boardstack from a fresh install of Ubuntu 14.04

i) Freshly install Ubuntu 14.04
Once installation is finished, update all packages:
'sudo apt-get update'
'sudo apt-get upgrade'
'sudo apt-get update'

ii) Add a softlink so that gmake points to make:
'sudo ln -s /usr/bin/make /usr/bin/gmake'

iii) Install the following via 'sudo apt-get install <package>'
libxml2-dev
g++
libbz2-dev
libqt4-dev
python-dev
lib32z1-dev
vim
subversion
tsch

iv) Download software package and make:
Directory: /home/
'svn co https://www.phys.hawaii.edu/repos/belle2/itop/electronics/branches/XRM'
Directory: ~/XRM/software/gigE/
'source setup_env_template.sh'
'make clean'
'make' (should make with no errors)

v) Install Vivado 2014.4 using web pack (used Design edition since limited in space)
'chmod +x Xilinx_installation_file.bin'
'sudo ./Xilinx_installation_file.bin'
install to /opt/Xilinx/...
allow write permissions to Xilinx folder:
'sudo chmod 777 -R /opt/Xilinx/'
'sudo chmod 777 -R ~/.Xilinx'
Open ~/.bashrc in your favorite text editor and add the following:
____________________________________________________
XILINXD_LICENSE_FILE=<your_license>
LM_LICENSE_FILE=<your_license>
export XILINXD_LICENSE_FILE
export LM_LICENSE_FILE
source /opt/Xilinx/Vivado/2014.4/settings64.sh
____________________________________________________
Now show be able to run vivado by typing vivado from xterm

vi) Setting up network for communication with boardstack:
The firmware has been setup to communicate with a workstation using point-to-point topologies.
First, connect a SFP module from the SCROD to a media converter, then connect the Ethernet cable to your workstation.
Workstation IP
From Network Connections, add a new Ethernet connection
From the Ethernet tab, select your network adapter Device MAC Address
Statically set IP address:
On IPv4 tab, select Manual from drop-down list
Click on Add and add the following:
Address: 192.168.10.200
Subnet mask: 255.255.255.0
Gateway: 0.0.0.0
SCROD firmware IP
The firmware is currently set to use IP address 192.168.10.***
where the last 3 digits is the ID of the SCROD. This IP will come in handy when launching the communication GUI.

vii) Program FPGA
Directory: ~/XRM/
Upload bitfiles to FPGAs on chain ‘xmd -tcl program-bit-and-elf-and-go.xmd.tcl’

viii) Run GUI
Directory: ~/XRM/software/gigE/
'Source setup_env_template.sh'
Now run GUI: ‘bin/develTest 192.168.10.101’
**Note** 101 is the SCROD board ID, this should be on the SCROD itself on a whitish label.
To test whether or not link to SCROD is up, from configuration tab on GUI, click “Read Configuration” button on the bottom

ix) Configure boardstack
Open a new terminal window and source setup_env_template.sh again
Directory: ~/XRM/software/gigE/pnnl/
Open configure_boardstack.csh with your favorite text editor
On the line 'foreach carrier(...)', starting from 0, sequential add numbers for the amount of carriers on the boardstack
Example: 'foreach carrier(0 1 2)' is used for 3 carriers on the boardstack
Save and run the file: './configure_boardstack.csh'
On the GUI from the configuration tab, change the following parameters:
trigMask -> 0xe (for 1 carrier), 0xc (for 2 carriers), 0x8 (for 3 carriers)
featureExtractionMode -> Passthrough

x) Pull Data
Directory: ~/XRM/software/gigE/pnnl/
'/.runtest.csh'

xi) Parse Data
Directory: ~/XRM/software/gigE/pnnl/data
Download file attached to this ELOG to directory
Compile: 'gcc -o XRMdataExtractor XRMdataExtractor.c'
Parse data: 'XRMdataExtractor test_c0_1.bin'
Open XRM_data_test_c0_1.bin.txt using your favorite text editor to look at the data

xii) Future Additions
XRMpedExtractor - This program will determine pedestals
  3   Tue May 3 08:11:06 2016 M. Andrewdocumentationwhat was done in January 2016

Here is a data dump of everything that happened on the asus laptop while getting the laste 2015 / early 2016 incarnation of the XRM tested before being delivered to KEK on the weekend of January 24th.  Everything was done in bash and the firmware only addressed one carrier at a time, so the purpose of this elog entry is simply to archive the information.

  4   Sat May 7 20:52:24 2016 James Bynes IIIInstructionsPlotting data from XRM boardstack

The following package will allow you to parse binary data from TargetX and output pedestal subtracted plots as well as a separate pedestal subtract text file in tabbed column format.

You will need python, numpy, scipy, and matplotlib packages installed. If you don't have them already, they can be installed through terminal with the following line (in Debian or Ubuntu):
sudo apt-get install python-numpy python-scipy python-matplotlib


Extract package to $PWD/pnnl/data/ directory

After taking data from XRM boardstack run the following command:
*note* binfile must be in the same directory
python XRM_script.py <binfile> <# of carriers> <# of windows> <plot 1 or 0 (yes or no?)>

The script will automatically compile c code and take pedestals if needed

example: (2 carriers) (4 windows) (yes plot)
python XRM_script.py test_2.bin 2 4 1
test_2.bin in included in download package for testing

Outputs:
Folder plots/ -- All plots will be stored here
XRMdataExtractor -- Data extractor program
XRMpedExtractor -- Pedestal extractor program
XRM_dataheader_<filename>.txt -- Raw data header
XRM_data_<filename>.txt -- Raw data in tab column format
XRM_pedHeader_<filename>.txt -- Pedestal only data header
XRM_ped_<filename>.txt -- Pedestal only data in tab column format
XRM_<filename>_ped_subtracted.txt -- Pedestal subtracted data in tab column format
  5   Tue May 17 16:03:12 2016 Gary Varnerreportcompilation log

Following up on James` suggestion, have posted transcript of compilation log below.

Not sure if there is anything should worry about here.

Strangely, the ton of warnings saw the first time I tried went away...

 

  6   Wed May 18 01:13:55 2016 Chris Ketter, Gary Varneranalysisfirst data sets

After getting data logging earlier in the day, Chris installed the detector and we took a look at data.

The amp board gain is set to lowest setting.  Still, when looking at pedestal subtracted data, the preamps were picking up clear noise.

This may have impacted the pedestals, which were still noisy with preamps off, but long cables/detector connected.

Therefore cables disconnected, and noise demonstrated to be expected (Attachment 1).  In this and subsequent plots, the x-axis sample number (approx 0.36ns/sample) and y-axis is ADC (roughly 1mV/count).

As a training exercise, Chris configured and logged these data sets.

Detector was reconnected and powered, with reference plots for ch0, ch1 in subsequent 2 attachments.

The noise is clearly correlated between channel pairs, as they are interleaved/looking at same signal.

Looking at a different channel (ch6), the noise isn't so clearly correlated.

Because each trace is 4k samples, it is easy to focus on outliers, so a less biased approach is to look at the ensemble distributions.

An example of the two conditions for ch. 1 is posted as the last 2 plots, where the RMS spread is seen to increase from about 2 to 7 ADC counts RMS.

Interesting to compare values in the tunnel.

 

  7   Wed May 18 21:32:21 2016 Gary Varnernoise during RF conditioning(?)carrier 0, asic 0

There is bursts of noise seen in the longer record lengths (1).

Some channels are quieter (2), though all see hints of 500MHz (3).

Channels 6&7 have pick-up that looks very much like 500MHz. (4).

Anyway, there is potentially good news here:

1) we aren`t completely deafened

2) a concurrent EMI baseline subtraction may be possible (use nominally unilluminated channel)

Key will be to see how large signal is.

 

  8   Thu May 19 02:08:09 2016 Gary Varneranalysisstatistics during RF on run

Summary statistics for short [1 run @ 64 windows] (1) and longer [100x] (2) show rather similar responses, where channels 6&7 are clearly noisier, while all others are in decent agreement.

It becomes clearer in the larger statistics that the distribution looks bimodal.  This could be due to amplifier chain instability/oscillation.

As a check of trying a common mode subtraction, did ch1-ch0 (3) and ch2-ch0 (4).  In the first case this perhaps makes sense, if the signal is 500MHz, the phase difference leads to the difference seen.  Should try to plot this modulo period and see if forms a periodogram.  For channels that should be in phase, the improvement isn't as much as would think, so this needs further investigation.

  9   Thu May 19 13:49:23 2016 Gary Varnerdata taking problem reportmorning 20-MAY-2016 JST

After beam came back on overnight, wanted to get a background reference data set.

However when trying to log data via GUI, the trigger number wasn't incrementing, nor a non-zero .bin file being created.

Restarted the GUI and confirmed that registers could be read, but still no response to triggers. 

Tried selecting anoher ASIC and reconfig.  Bricked the GUI.  (Single Event Upset?)

Don't think bit file only FW reflash will work, but can try if unable to get power cycle of APC to work relatively soon.

Otherwise we are dead in the water.

  10   Thu May 19 19:48:14 2016 John Flanagan, Gary Varnernetwork documentationAPC network configuration
host name  : psxrd08
IP address : 172.19.62.89
MAC address: 00:c0:b7:b8:94:f9


> SuperKEKB ネットワーク 登録申請を受け付けました。
> ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━
>  申請日         : 2016-05-19 15:49:00
>  申請内容       : 新規
>  登録者名       : フラナガン
>  登録者の所属   : Beam Monitor
>  電子メール     : john.flanagan@kek.jp
>  機器の種類     : ネットワーク電源
>  使用OS         : 
>  設置場所       : D4,D8,トンネル内
>  Host name      : psxrd08
>  DHCP server    : Yes
>  MAC address    : 00-c0-b7-b8-94-f9
>  VLAN           : KEKB_CA_1
>  機器の使用用途 : ｘ線モニター用
>  その他         : 
> ━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━
>

  11   Thu May 19 23:01:35 2016 Gary Varneranalysisfirst try

Started a 1Hz run and let it run, the tail end of which might have had the detector in the xray beam.

Stopped run, but the GUI crashed when trying to close the very large (>1.5k event) run.

Large files bit unwieldy to work with, but first time series plot for channel 0 attached (1).

And even more clearly, on log plot, can see nothing going on, so either had already crashed or was never in beam (2).

APC not making DHCP requests, so kinda stuck.

  12   Fri May 20 16:08:46 2016 John Flanagan, Gary Varnerhardware documentationAPC and PDU AC-power settings

Controlling remotely via separate laptop, with connections on the 2 subnets .0  and  .1

APC is currently Default IP  192.168.1.201

apc/apc

LER PDU MAC:
00-06-18-75-4f-57
HER PDU MAC:
00-06-18-75-4f-10

Default IP:
192.168.0.216

user:  snmp
pass:  1234
 

  13   Fri May 20 23:30:23 2016 Chris KetterinformationConfiguration of XRM

Attachment 1 is a block diagram of the XRM setup for the Low Energy Ring (LER). Physically, this is located underneath the right wing of Fuji Hall, tens of meters away from the crossing point of the beams (180deg around ring from interaction point). Directly upstairs is the optics hut where the readout PC is located. 

Attachment 2 details the physical location of all the components around the fermionics detector.

Attachment 3 is picture of the fermionics detector area from farther back.

Attachment 4 shows (somewhat) the source of the X-Rays and the positron beam pipe from which they originate. 

 

  14   Sat May 21 01:02:13 2016 John Flanagan, Gary Varnerrun reportFirst Light!

After a battle to sort out the networking issues with the APC (on loan) and PDU, able to get all working fine, and logged in separate Elog.

The ability to power cycle XRM proved essential as periodically something is happening in the tunnel which causes the network connections (both for XRM and APC) to get cycled.

While the APC can simply be logged into again, XRM requires a reprogram/reconfig cycle.  Interestingly, the link comes back and registers can be read back.

But data taking/writes either are ignored or cause the link to become bricked.  It could be an ARM stop, where some type of soft reset might work.

Anyway, without proper alignment fiducials, were scanning blind.  To try and see something, the mask was removed. hitting the detector with ribbon of x-rays.

Clearly seen in the first attachment.

A zoom in for the 4 pixels being read is shown in the second attachment. 

Obviously some signal processing is going to be needed to deal with the AC-coupled nature of this signal, and possibly induced ringing. 

However the Signal-to-Noise is encouraging, as the amp board is running at minimal gain.

  15   Tue Jan 22 07:56:56 2019 M. Andrewdocumentationinstructions for setup, compiling and data acquisition

File XRM.instructions.txt gives the 2019-era details on running the XRM.

  16   Tue Jun 18 11:29:30 2019 M. Andrewdocumentationraspberry pi

to install:

cd
mkdir -p build
cd ~/build
git clone https://github.com/mzandrew/XRM.git

to run:

cd ~/build/XRM/predator
./get_temperatures.py # reads temps from SPI thermocouple
27.9 26.3
./read_serial.py # reads temp + ADC values from microcontroller for ammeter function
24.8 1.368 1.406
./take_pic.sh 
./lights_on.sh 
./lights_off.sh 
./temperatures.sh # grabs snapshot of KEKB status and plots temperatures on it
./make_video.sh # makes video from individual images
./upload_to_samd21.sh # programs microcontroller (ADC for amplifier's ammeter)
./daemon.sh # started in /etc/rc.local upon bootup - runs in a loop once a minute: get_temperatures.py, read_serial.py and take_pic.sh

notes:

logfile for temperatures and voltages (for ammeter) is in logs/temperatures.log

latest picture is stored in pictures/picture.jpg; then archived with a date/time stamp in the filename (pictures/2019-06-13.105227.jpg)
 

  17   Mon Sep 30 09:36:16 2019 M. Andrewdocumentationmeasurements of accelerator clock and revolution marker

Following Nuclear Instruments and Methods in Physics Research A 499 (2003) 138–166, we know that the distributed accelerator clock is 508.8875 MHz (508.91 MHz measured) and that there are 5120 RF buckets.  So the revolution marker should come at 99.3921 kHz (99.39 kHz measured).

Furthermore, it should be noted that the revolution marker is a 50% duty cycle NIM signal and the accelerator clock is about 600 mVpp.  The RMS of the delay between an edge of the accelerator clock and the revolution marker is about 67 ps.  These measurements were done in the D8 XRM optics hut (Oho) after the addition of cabling and RF/NIM fanout modules were inserted (but before the long cables down to the tunnel).

The scope used for the measurements was a Rhode & Schwartz RTO 1044.

  18   Mon Sep 30 10:59:35 2019 M. AndrewdocumentationAlthea/RAFFERTY

The firmware running on Althea/RAFFERTY https://github.com/mzandrew/hdl/blob/master/verilog/src/mza-test032.pll_509divider_and_revo_encoder_plus_calibration_serdes.althea.v takes a 508.8875 MHz clock input, and uses a PLL to generate 4 phases of a 127.221875 MHz clock (input/4).  Then it uses a 4-bit iserdes on the input clock to register the phase of the revolution marker on the output clock.  It takes about 1 second worth of these and populates a histogram.  Then it uses the most popular choice and outputs the corresponding phase of the 127 MHz so that the boardstack gets a revolution marker on that 127 MHz clock and the "bunch-0" happens during the first quarter of whichever 127 MHz clock the boardstack sees.  This scheme *should* avoid having bunch-0 show up in a different quarter of the 127 MHz clock upon every power cycle.

The measured difference between revolution marker in from accelerator to revolution marker out to boardstack is 93.64 ns.  This is measured on Althea/RAFFERTY in the D8 HER optics hut, but should be similar when in the tunnel because Althea/RAFFERTY has since been moved down there and the cable lengths after that are on the order of ~1 m.  Overall delay from the accelerator revolution marker (in optics hut) to what Althea/RAFFERTY gets is still yet to be measured (and moreover what the phase of that is to when the synchrotron radiation from "bunch-0" goes through the HER He box).

  19   Fri Oct 4 08:55:23 2019 M. Andrewdocumentationinstructions for pdu control
Control of the power distribution unit (pdu) is done from xrd04rp2.  The script pdu.sh is in the $PATH.

to get pdu status:
xrm@xrd04rp2:~$ pdu.sh 
  [on] He box pwr
 [off] Boardstack
0 W total

to power the boardstack on:
xrm@xrd04rp2:~$ pdu.sh on
  [on] He box pwr
  [on] Boardstack
50.0 W total

to turn the boardstack off:
xrm@xrd04rp2:~$ pdu.sh off
  [on] He box pwr
 [off] Boardstack
0 W total
  20   Fri Oct 4 10:04:12 2019 M. Andrewdocumentationinstructions for programming boardstack
Programming the boardstack is done from xrd04rp2.  The script boardstack.sh is in the $PATH.

To make sure the svn repo is up to date, run svnup.sh (also in $PATH) before programming:
xrm@xrd04rp2:~$ svnup.sh 
Updating '.':
At revision 2869.

Program the boardstack:
xrm@xrd04rp2:~$ boardstack.sh 
Open On-Chip Debugger 0.10.0+dev-00930-g09eb941c (2019-09-17-03:49)
Licensed under GNU GPL v2
For bug reports, read
	http://openocd.org/doc/doxygen/bugs.html
Info : clock speed 6000 kHz
Info : JTAG tap: carrier3.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier3.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: carrier2.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier2.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: carrier1.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier1.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: carrier0.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier0.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: SCROD.pl tap/device found: 0x23731093 (mfg: 0x049 (Xilinx), part: 0x3731, ver: 0x2)
Info : JTAG tap: SCROD.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : carrier3.cpu.0: hardware has 6 breakpoints, 4 watchpoints
Info : carrier3.cpu.1: hardware has 6 breakpoints, 4 watchpoints
Info : carrier2.cpu.0: hardware has 6 breakpoints, 4 watchpoints
Info : carrier2.cpu.1: hardware has 6 breakpoints, 4 watchpoints
Info : carrier1.cpu.0: hardware has 6 breakpoints, 4 watchpoints
Info : carrier1.cpu.1: hardware has 6 breakpoints, 4 watchpoints
Info : carrier0.cpu.0: hardware has 6 breakpoints, 4 watchpoints
Info : carrier0.cpu.1: hardware has 6 breakpoints, 4 watchpoints
Info : SCROD.cpu.0: hardware has 6 breakpoints, 4 watchpoints
Info : SCROD.cpu.1: hardware has 6 breakpoints, 4 watchpoints
Info : Listening on port 3333 for gdb connections
Info : Listening on port 3334 for gdb connections
Info : Listening on port 3335 for gdb connections
Info : Listening on port 3336 for gdb connections
Info : Listening on port 3337 for gdb connections

-rw-r----- 1 xrm idlab 8695644 Oct  4  2019 SCROD.bitfiles/ScrodRevB_b2tt_00010095.bit
-rw-r----- 1 xrm idlab 3828341 Oct  1 07:35 carrier.bitfiles/CarrierRevE_00000062.bit
-rwxr-x--- 1 xrm idlab 239907 Sep 20 12:54 carrier.elffiles/CarrierRevE_PS_app_00000021.elf
-rwxr-x--- 1 xrm idlab 360637 Sep 17 05:56 SCROD.elffiles/Scrod_PS_app_0000006e.elf
-rw-r----- 1 xrm idlab 20597 Sep 17 05:58 carrier.bitfiles/ps7_init.tcl
-rw-r----- 1 xrm idlab 36137 Sep 17 05:57 SCROD.bitfiles/ps7_init.tcl

-rw-r----- 1 xrm idlab 8695644 Oct  4  2019 SCROD.bitfiles/ScrodRevB_b2tt_00010095.bit
-rw-r----- 1 xrm idlab 3828341 Oct  1 07:35 carrier.bitfiles/CarrierRevE_00000062.bit
programming bit file on SCROD...
programming bit file on carrier 0...
programming bit file on carrier 1...
programming bit file on carrier 2...
programming bit file on carrier 3...

-rwxr-x--- 1 xrm idlab 239907 Sep 20 12:54 carrier.elffiles/CarrierRevE_PS_app_00000021.elf
-rwxr-x--- 1 xrm idlab 360637 Sep 17 05:56 SCROD.elffiles/Scrod_PS_app_0000006e.elf
-rw-r----- 1 xrm idlab 20597 Sep 17 05:58 carrier.bitfiles/ps7_init.tcl
-rw-r----- 1 xrm idlab 36137 Sep 17 05:57 SCROD.bitfiles/ps7_init.tcl

halting all the ARMs...
Error: Can't assert SRST: nSRST signal is not defined
Info : JTAG tap: carrier3.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier3.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: carrier2.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier2.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: carrier1.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier1.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: carrier0.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier0.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: SCROD.pl tap/device found: 0x23731093 (mfg: 0x049 (Xilinx), part: 0x3731, ver: 0x2)
Info : JTAG tap: SCROD.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Warn : carrier3.cpu.0: ran after reset and before halt ...
Warn : carrier3.cpu.1: ran after reset and before halt ...
Warn : carrier2.cpu.0: ran after reset and before halt ...
Warn : carrier2.cpu.1: ran after reset and before halt ...
Warn : carrier1.cpu.0: ran after reset and before halt ...
Warn : carrier1.cpu.1: ran after reset and before halt ...
Warn : carrier0.cpu.0: ran after reset and before halt ...
Warn : carrier0.cpu.1: ran after reset and before halt ...
Warn : SCROD.cpu.0: ran after reset and before halt ...
Warn : SCROD.cpu.1: ran after reset and before halt ...
Info : carrier3.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier3.cpu.0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT
Info : carrier3.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier3.cpu.1: MPIDR level2 0, cluster 0, core 1, multi core, no SMT
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000001d3 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x200001df pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Info : carrier2.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier2.cpu.0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT
Info : carrier2.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier2.cpu.1: MPIDR level2 0, cluster 0, core 1, multi core, no SMT
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000001d3 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x200001df pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Info : carrier1.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier1.cpu.0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT
Info : carrier1.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier1.cpu.1: MPIDR level2 0, cluster 0, core 1, multi core, no SMT
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000001d3 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x200001df pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Info : carrier0.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier0.cpu.0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT
Info : carrier0.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier0.cpu.1: MPIDR level2 0, cluster 0, core 1, multi core, no SMT
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000001d3 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x200001df pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Info : SCROD.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : SCROD.cpu.0: MPIDR level2 0, cluster 0, core 0, multi core, no SMT
Info : SCROD.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : SCROD.cpu.1: MPIDR level2 0, cluster 0, core 1, multi core, no SMT
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x000001d3 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x200001df pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Error: Can't assert SRST: nSRST signal is not defined
Info : JTAG tap: carrier3.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier3.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: carrier2.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier2.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: carrier1.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier1.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: carrier0.pl tap/device found: 0x1372c093 (mfg: 0x049 (Xilinx), part: 0x372c, ver: 0x1)
Info : JTAG tap: carrier0.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : JTAG tap: SCROD.pl tap/device found: 0x23731093 (mfg: 0x049 (Xilinx), part: 0x3731, ver: 0x2)
Info : JTAG tap: SCROD.cpu tap/device found: 0x4ba00477 (mfg: 0x23b (ARM Ltd.), part: 0xba00, ver: 0x4)
Info : carrier3.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier3.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x00000193 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x2000019f pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Info : carrier2.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier2.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x00000193 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x2000019f pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Info : carrier1.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier1.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x00000193 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x2000019f pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Info : carrier0.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : carrier0.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x00000193 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x2000019f pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
Info : SCROD.cpu.0 rev 0, partnum c09, arch f, variant 3, implementor 41
Info : SCROD.cpu.1 rev 0, partnum c09, arch f, variant 3, implementor 41
target halted in ARM state due to debug-request, current mode: Supervisor
cpsr: 0x00000193 pc: 0xffffff34
MMU: disabled, D-Cache: disabled, I-Cache: disabled
target halted in ARM state due to debug-request, current mode: System
cpsr: 0x2000019f pc: 0xffffff28
MMU: disabled, D-Cache: disabled, I-Cache: disabled
successful!
programming elf file on carrier0...
programming elf file on carrier1...
programming elf file on carrier2...
programming elf file on carrier3...
programming elf file on SCROD...

Note:  If the boardstack is not powered, you will get many "Error: Invalid ACK (0) in DAP response" messages.

[optional] Then check how much power is being drawn:
xrm@xrd04rp2:~$ pdu.sh 
  [on] He box pwr
  [on] Boardstack
80.0 W total
  21   Fri Oct 4 10:18:44 2019 M. Andrewdocumentationinstructions for checking boardstack status and temperature
This is done from sixrmlaptop02 (a.k.a. balrog017).  These scripts are not in the $PATH, so you must cd to ~/build/uh-svn-repo/trunk/software/b2l/scripts_dev before running them.

To check basic status (whether you can talk to a boardstack, which firmware is programmed on it, what the temperature is, etc):
idlab@balrog017:~/build/uh-svn-repo/trunk/software/b2l/scripts_dev$ ./get_status.py 0
Writing output from ./get_status.py to logfile: logs/2019-10-05.051508.s17a.SCROD004.get_status.log
SCROD #4 RawVoltages: 1.880 V 3.861 V 4.807 V
 WARNING: RAW2 voltage unnecessarily high (by 0.762 V)
 WARNING: RAW3 voltage unnecessarily high (by 0.383 V)
         FPGA_ver ARM_ver  trigMask DieTemp WallTemp -----other------ ARM_stat
   SCROD 00010095 0000006e 0000000f  52.7 C  34.5 C  31.1 C  13.2 %RH Running
carrier0 00000062 00000021 00000000  61.1 C  43.8 C  39.0 C  41.8 C   Running
carrier1 00000062 00000021 00000000  60.2 C  46.0 C  41.2 C  44.2 C   Running
carrier2 00000062 00000021 00000000  59.9 C  46.0 C  42.2 C  44.8 C   Running
carrier3 00000062 00000021 00000000  60.7 C  44.2 C  41.5 C  43.2 C   Running
readoutBitSlip (IRSX config?) = [0, 0, 0, 0]
readoutWindows (prep done?)   = [0, 0, 0, 0]
Feature extraction mode       = 0 Normal
SCROD_AxiCommon_asicTimeoutMask: 0
ProcessPacketProblemCounter = 0
nSamplesWrongCounter = 0
SCROD_PS_EXTENDED_STATUS_ADDR = 0x1
SCROD_PS_pendingWaves = 0
SCROD_PS_procEventCnt = 0
SCROD_PS_totalWaves = 0
SCROD_AxiCommon_eventCnt = 0
SCROD_AxiCommon_pendingEventCount = 0
SCROD_AxiCommon_maxPendingEventCount = 0
SCROD_PS_AXI_FAULT_STATUS_ADDR = 0x0
SCROD_PS_AXI_FAULT_ADDRESS_ADDR = 0x0
SCROD_PS_OFFENDING_ADDRESS0_ADDR = 0x0
SCROD_PS_OFFENDING_ADDRESS1_ADDR = 0x0

Note:  Before configuration, the warning messages about the raw voltages being too high should be ignored.

To check detailed temperature, humidity and power draw:
idlab@balrog017:~/build/uh-svn-repo/trunk/software/b2l/scripts_dev$ ./log_temps.py 0
Writing output from ./log_temps.py to logfile: logs/2019-10-05.052200.s17a.SCROD004.log_temps.log

------------------------------------------------------------
s17a.SCROD004  DATE 2019-10-05 05:22:00.661181
Parameter          SCROD carrier0 carrier1 carrier2 carrier3
----------         ----- -------- -------- -------- --------
fwVersion       00010095 00000062 00000062 00000062 00000062
elfVersion      0000006e 00000021 00000021 00000021 00000021
------------------------------------------------------------
tempFPGA          53.6 C   61.4 C   60.8 C   60.5 C   60.7 C
tempFPGAMAX       55.6 C   63.7 C   62.8 C   62.9 C   63.5 C
tempWall          35.0 C   44.2 C   46.5 C   46.5 C   44.8 C
tempWallMAX       35.0 C   44.2 C   46.8 C   46.5 C   45.0 C
tADC0                                                       
tADC0MAX                                                    
tADC1                                                       
tADC1MAX                                                    
tempASIC01                 39.5 C   41.8 C   42.8 C   42.0 C
tempASIC23                 42.2 C   45.0 C   45.5 C   43.8 C
tempASIC01MAX              39.5 C   42.0 C   42.8 C   42.0 C
tempASIC23MAX              42.2 C   45.0 C   45.5 C   43.8 C
humidityTemp      31.3 C                                    
humidityTempMAX   31.3 C                                    
trigTranTemp                                                
trigTranTempMAX                                             
dataTranTemp       0.0 C                                    
dataTranTempMAX    0.0 C                                    
tempMAX           55.6 C   63.7 C   62.8 C   62.9 C   63.5 C
maximum temperature measured on this boardstack is:   63.7 C
------------------------------------------------------------
humidity         12.9 %RH                                    
------------------------------------------------------------
vRAW1            1.875 V                                    
vRAW2            3.860 V                                    
 WARNING: RAW2 voltage unnecessarily high (by 0.761 V)
vRAW3            4.803 V                                    
 WARNING: RAW3 voltage unnecessarily high (by 0.379 V)
vPINT1p0         0.990 V  1.014 V  1.004 V  0.997 V  1.004 V
vINT1p0          0.994 V  1.012 V  1.004 V  0.998 V  1.003 V
vBRAM1p0         0.994 V  1.012 V  1.004 V  0.998 V  1.004 V
vGTX1p0          0.998 V                                    
vGTX1p2          1.194 V                                    
vDDR1p2          1.193 V                                    
vPLLPAUX1p8      1.800 V  1.805 V  1.807 V  1.801 V  1.802 V
vAUXIO1p8        1.795 V                                    
vAUX1p8          1.792 V  1.813 V  1.795 V  1.795 V  1.796 V
vVCCO1p8         1.795 V                                    
v2p5             2.494 V                                    
vMIO2p5          2.492 V                                    
vVCCO2p5         2.492 V                                    
v3p3             3.266 V                                    
vASIC0                                                      
vASIC1                                                      
vASIC2                                                      
vASIC3                                                      
vRAW1            1.875 V                                    
vRAW2            3.860 V                                    
 WARNING: RAW2 voltage unnecessarily high (by 0.761 V)
vRAW3            4.803 V                                    
 WARNING: RAW3 voltage unnecessarily high (by 0.379 V)
------------------------------------------------------------
iPINT1p0                                                    
iINT1p0           921 mA                                    
iBRAM1p0           17 mA                                    
iGTX1p0           679 mA                                    
iGTX1p2           468 mA                                    
iDDR1p2            52 mA                                    
iPLLPAUX1p8        84 mA                                    
iAUXIO1p8          29 mA                                    
iAUX1p8           157 mA                                    
iVCCO1p8           83 mA                                    
i2p5              107 mA                                    
iMIO2p5            22 mA                                    
iVCCO2p5           42 mA                                    
i3p3              174 mA                                    
iPINT1p0MAX                                                 
iINT1p0MAX        924 mA                                    
iBRAM1p0MAX        21 mA                                    
iGTX1p0MAX        678 mA                                    
iGTX1p2MAX        471 mA                                    
iDDR1p2MAX         66 mA                                    
iPLLPAUX1p8MAX     91 mA                                    
iAUXIO1p8MAX       32 mA                                    
iAUX1p8MAX        160 mA                                    
iVCCO1p8MAX        87 mA                                    
i2p5MAX           110 mA                                    
iMIO2p5MAX         25 mA                                    
iVCCO2p5MAX        44 mA                                    
i3p3MAX           181 mA                                    
iASIC0                                                      
iASIC1                                                      
iASIC2                                                      
iASIC3                                                      
iASIC0MAX                                                   
iASIC1MAX                                                   
iASIC2MAX                                                   
iASIC3MAX                                                   
------------------------------------------------------------
pASIC0                                                      
pASIC1                                                      
pASIC2                                                      
pASIC3                                                      
pAMPs                                                       
pASICs                                                      
------------------------------------------------------------

Note:  There are no entries for some items above because those features are not present on the "carrier revE2 (special XRM edition)"

Other various scripts are available, some of which have functionality you can guess from the name:
idlab@balrog017:~/build/uh-svn-repo/trunk/software/b2l/scripts_dev$ ls -lart *.py *.sh
-rwxr-x--- 1 idlab idlab  1925 Sep 30  2017 get_n_events.sh
-rwxr-x--- 1 idlab idlab   994 Dec 28  2017 ADC_threshold_scan.sh
-rwxr-x--- 1 idlab idlab   677 Dec 20  2018 b2lreg.py
-rwxr-x--- 1 idlab idlab   609 Jan 15  2019 getReady.sh
-rwxr-x--- 1 idlab idlab  3514 Jan 15  2019 dumpregisters.sh
-rwxr-x--- 1 idlab idlab    95 Feb  9  2019 run_all_gnuplots.sh
-rw-r----- 1 idlab idlab  1163 Feb 14  2019 irsx.py
-rwxr-x--- 1 idlab idlab   694 Mar  2  2019 watchVirtualTTYs.py
-rwxr-x--- 1 idlab idlab   612 Mar  9  2019 setTimeout.py
-rwxr-x--- 1 idlab idlab  3890 Mar  9  2019 scrod_currents.py
-rw-r----- 1 idlab idlab   627 Mar  9  2019 ReadThreshold.py
-rw-r----- 1 idlab idlab   563 Mar  9  2019 ReadFB.py
-rwxr-x--- 1 idlab idlab   777 Mar  9  2019 prep1carrier_data_trueROI.py
-rwxr-x--- 1 idlab idlab  3721 Mar  9  2019 prep1asic_data_trueROI.py
-rwxr-x--- 1 idlab idlab  4155 Mar  9  2019 monitor_temp.py
-rwxr-x--- 1 idlab idlab  1583 Mar  9  2019 live_voltage_readout.py
-rwxr-x--- 1 idlab idlab  9860 Mar  9  2019 juice.py
-rw-r----- 1 idlab idlab 25619 Mar  9  2019 irsxSetFunction.py
-rw-r----- 1 idlab idlab  2356 Mar  9  2019 DebugInfoWarningError24.py
-rwxr-x--- 1 idlab idlab  1100 Mar  9  2019 config1carrier_trueROI.py
-rwxr-x--- 1 idlab idlab  1192 Mar  9  2019 config1carrier_fast.py
-rwxr-x--- 1 idlab idlab 21683 Mar  9  2019 config1asic_trueROI.py
-rwxr-x--- 1 idlab idlab  3323 Mar  9  2019 config1asic_fast.py
-rwxr-x--- 1 idlab idlab  7904 Mar  9  2019 measure_iASIC_as_a_function_of_vbias_and_vbias2.py
-rwxr-x--- 1 idlab idlab 21195 Mar  9  2019 ethudp.py
-rwxr-x--- 1 idlab idlab  4768 Mar 12  2019 scanLoadLatch.py
-rwxr-x--- 1 idlab idlab 34947 Mar 15  2019 threshScan1boardstack.py
-rw-r----- 1 idlab idlab  3686 Mar 16  2019 B2L_errorstats.py
-rwxr-x--- 1 idlab idlab  3388 Mar 21  2019 get_fe_ped.py
-rwxr-x--- 1 idlab idlab   862 Mar 21  2019 config1boardstack_trueROI.py
-rwxr-x--- 1 idlab idlab  6997 Mar 26  2019 get_status.py
-rwxr-x--- 1 idlab idlab 25247 Mar 30  2019 testPollableMemory.py
-rwxr-x--- 1 idlab idlab  6305 Apr  6 08:54 log_temps.py
-rwxr-x--- 1 idlab idlab    68 May 18 09:23 edit.sh
-rwxr-x--- 1 idlab idlab   171 May 23 10:56 what_I_am_doing_right_now.sh
-rw-r----- 1 idlab idlab  1021 May 23 10:56 SCROD_PS_defs.py
-rwxr-x--- 1 idlab idlab  4119 May 23 10:56 prep1boardstack_fe.py
-rwxr-x--- 1 idlab idlab  3816 Jun 22 03:17 config1boardstack_fast.py
-rwxr-x--- 1 idlab idlab  1111 Jun 22 03:18 prep1boardstack_data_trueROI.py
-rwxr-x--- 1 idlab idlab   278 Jun 27 03:49 push_peds.sh
-rwxr-x--- 1 idlab idlab 10903 Sep 18 05:17 xrm.py
  22   Fri Oct 4 10:33:53 2019 M. Andrewdocumentationinstructions for boardstack configuration
This is done from sixrmlaptop02 (a.k.a. balrog017).  These scripts are not in the $PATH, so you must cd to ~/build/uh-svn-repo/trunk/software/b2l/scripts_dev before running them.

To configure the ASICs, set desired modes in the PL/PS (programmable logic/processing system) for operation, and then acquire pedestals:
idlab@balrog017:~/build/uh-svn-repo/trunk/software/b2l/scripts_dev$ ../scripts_rel/configure_boardstack_then_acquire_and_check_pedestals.sh a
/home/idlab/build/uh-svn-repo/trunk/software/b2l/scripts_rel/../scripts_dev/.config
$hslb_list = " a"

running in _fast mode from /home/idlab/build/uh-svn-repo/trunk/software/b2l/scripts_dev

xrm trigger enabled (4ad) = 00000000
number of carriers detected = 4
set up all registers on hslb a (boardstack 0)...
Writing output from ./config1boardstack_fast.py to logfile: logs/2019-10-05.053059.s17a.SCROD004.config1boardstack_fast.log
reg24b2 = 00000000 CARRIER_AxiCommon_heapEnabled
reg44b2 = 00000000 CARRIER_AxiCommon_heapEnabled
reg64b2 = 00000000 CARRIER_AxiCommon_heapEnabled
reg84b2 = 00000000 CARRIER_AxiCommon_heapEnabled
[ 0.000] ##########################################################
[ 0.000] ## Starting configuration of BS 0 / carrier 0 
[ 0.002] Writing trigger thresholds to PS registers
[ 0.020] Writing sstFB values (110, 109, 110, 110) to PS registers
[ 0.022] Starting asic fast autoconfiguration on carrier PS
[ 0.000] ##########################################################
[ 0.000] ## Starting configuration of BS 0 / carrier 1 
[ 0.003] Writing trigger thresholds to PS registers
[ 0.021] Writing sstFB values (110, 110, 110, 109) to PS registers
[ 0.023] Starting asic fast autoconfiguration on carrier PS
[ 0.000] ##########################################################
[ 0.000] ## Starting configuration of BS 0 / carrier 2 
[ 0.005] Writing trigger thresholds to PS registers
[ 0.023] Writing sstFB values (110, 110, 109, 109) to PS registers
[ 0.026] Starting asic fast autoconfiguration on carrier PS
[ 0.000] ##########################################################
[ 0.000] ## Starting configuration of BS 0 / carrier 3 
[ 0.007] Writing trigger thresholds to PS registers
[ 0.026] Writing sstFB values (110, 110, 110, 110) to PS registers
[ 0.028] Starting asic fast autoconfiguration on carrier PS
Wait until all ASICs are configured...
00 0001[1] 0001[1] 0001[1] 0001[1] 
00 0001[7] 0001[7] 0001[7] 0001[7] 
01 0001[7] 0001[7] 0001[7] 0001[7] 
01 0001[7] 0001[7] 0001[7] 0001[7] 
02 0001[7] 0001[7] 0001[7] 0001[7] 
02 fff2[e] 0001[7] fff2[e] 0001[7] 
03 fff2[e] fff2[e] fff2[e] 0001[7] 
03 fff2[e] fff2[e] fff2[e] fff2[e] 
03 fff2[e] fff2[e] fff2[e] fff2[e] 
*****************************************************
carrier 0 configuration SUCCESS for all ASICS
carrier 1 configuration SUCCESS for all ASICS
carrier 2 configuration SUCCESS for all ASICS
carrier 3 configuration SUCCESS for all ASICS
*****************************************************
return value = 0
prepare boardstack to take data...
Writing output from ./prep1boardstack_data_trueROI.py to logfile: logs/2019-10-05.053103.s17a.SCROD004.prep1boardstack_data_trueROI.log
Found 4 carriers
BS 0, carrier 0, asic 0 [ phase: 1 0 ] ready for data
BS 0, carrier 0, asic 1 [ phase: 1 0 ] ready for data
BS 0, carrier 0, asic 2 [ phase: 0 ] ready for data
BS 0, carrier 0, asic 3 [ phase: 0 ] ready for data
BS 0, carrier 1, asic 0 [ phase: 1 1 0 ] ready for data
BS 0, carrier 1, asic 1 [ phase: 1 0 ] ready for data
BS 0, carrier 1, asic 2 [ phase: 0 ] ready for data
BS 0, carrier 1, asic 3 [ phase: 0 ] ready for data
BS 0, carrier 2, asic 0 [ phase: 0 ] ready for data
BS 0, carrier 2, asic 1 [ phase: 0 ] ready for data
BS 0, carrier 2, asic 2 [ phase: 0 ] ready for data
BS 0, carrier 2, asic 3 [ phase: 0 ] ready for data
BS 0, carrier 3, asic 0 [ phase: 1 0 ] ready for data
BS 0, carrier 3, asic 1 [ phase: 1 0 ] ready for data
BS 0, carrier 3, asic 2 [ phase: 1 0 ] ready for data
BS 0, carrier 3, asic 3 [ phase: 0 ] ready for data
return value = 0
ask PS to acquire pedestals...
Writing output from ./prep1boardstack_fe.py to logfile: logs/2019-10-05.053103.s17a.SCROD004.prep1boardstack_fe.log
Taking pedestals...
remaining triggers = 54785
remaining triggers = 54273
remaining triggers = 53505
remaining triggers = 52993
remaining triggers = 52481
remaining triggers = 51713
remaining triggers = 51201
remaining triggers = 50433
remaining triggers = 49921
remaining triggers = 49409
remaining triggers = 48641
remaining triggers = 48129
remaining triggers = 47361
remaining triggers = 46849
remaining triggers = 46337
remaining triggers = 45569
remaining triggers = 45057
remaining triggers = 44289
remaining triggers = 43777
remaining triggers = 43265
remaining triggers = 42497
remaining triggers = 41985
remaining triggers = 41217
remaining triggers = 40705
remaining triggers = 40193
remaining triggers = 39425
remaining triggers = 38913
remaining triggers = 38145
remaining triggers = 37633
remaining triggers = 36865
remaining triggers = 36353
remaining triggers = 35841
remaining triggers = 35073
remaining triggers = 34561
remaining triggers = 33793
remaining triggers = 33281
remaining triggers = 32769
remaining triggers = 32001
remaining triggers = 31489
remaining triggers = 30721
remaining triggers = 30209
remaining triggers = 29697
remaining triggers = 28929
remaining triggers = 28417
remaining triggers = 27649
remaining triggers = 27137
remaining triggers = 26625
remaining triggers = 25857
remaining triggers = 25345
remaining triggers = 24577
remaining triggers = 24065
remaining triggers = 23553
remaining triggers = 22785
remaining triggers = 22273
remaining triggers = 21505
remaining triggers = 20993
remaining triggers = 20481
remaining triggers = 19713
remaining triggers = 19201
remaining triggers = 18433
remaining triggers = 17921
remaining triggers = 17409
remaining triggers = 16641
remaining triggers = 16129
remaining triggers = 15361
remaining triggers = 14849
remaining triggers = 14337
remaining triggers = 13569
remaining triggers = 13057
remaining triggers = 12289
remaining triggers = 11777
remaining triggers = 11265
remaining triggers = 10497
remaining triggers = 9985
remaining triggers = 9217
remaining triggers = 8705
remaining triggers = 8193
remaining triggers = 7425
remaining triggers = 6913
remaining triggers = 6145
remaining triggers = 5633
remaining triggers = 4865
remaining triggers = 4353
remaining triggers = 3841
remaining triggers = 3073
remaining triggers = 2561
remaining triggers = 1793
remaining triggers = 1281
remaining triggers = 769
remaining triggers = 0
Pedestal Calc Success
Feature extraction mode = Passthru
write pedestals to disk...
collecting data in background thread (file peds/ped_hslb_s17a.dat)...
starting to collect data...
triggering readout of pedestals...
0/0
0/1
0/2
0/3
0/4
0/5
0/6
0/7
collected 8192 packets
-rw-r----- 1 idlab idlab 17072128 Oct  5 05:32 peds/ped_hslb_s17a.dat

Correctly read out 8192.0 packets

Splitting peds/ped_hslb_s17a.dat into peds/ped_hslb_s17a.ped.dat and peds/ped_hslb_s17a.RMS.dat
4096+0 records in
4096+0 records out
8536064 bytes (8.5 MB, 8.1 MiB) copied, 0.0356023 s, 240 MB/s
4096+0 records in
4096+0 records out
8536064 bytes (8.5 MB, 8.1 MiB) copied, 0.0414147 s, 206 MB/s
-rw-r----- 1 idlab idlab 8536064 Oct  5 05:32 peds/ped_hslb_s17a.ped.dat
-rw-r----- 1 idlab idlab 8536064 Oct  5 05:32 peds/ped_hslb_s17a.RMS.dat
use 'peddump' to read the files peds/ped_hslb_s17a.ped.dat and peds/ped_hslb_s17a.RMS.dat
convert pedestal/RMS files from dat to txt...
-rw-r----- 1 idlab idlab 17044537 Oct  5 05:32 peds/ped_hslb_s17a.ped.txt
-rw-r----- 1 idlab idlab 10069140 Oct  5 05:32 peds/ped_hslb_s17a.RMS.txt
generating pedestal/RMS png files...

run these commands on the appropriate machine:
root -l -b -q '../../fe/FEpedsSummary.C+("peds/ped_hslb_s17a")'
eog peds/ped_hslb_s17a*.png

-rw-r----- 1 idlab idlab 17072128 Oct  5 05:32 peds/ped_hslb_s17a.dat
-rw-r----- 1 idlab idlab  8536064 Oct  5 05:32 peds/ped_hslb_s17a.ped.dat
-rw-r----- 1 idlab idlab  8536064 Oct  5 05:32 peds/ped_hslb_s17a.RMS.dat
-rw-r----- 1 idlab idlab 17044537 Oct  5 05:32 peds/ped_hslb_s17a.ped.txt
-rw-r----- 1 idlab idlab 10069140 Oct  5 05:32 peds/ped_hslb_s17a.RMS.txt

[optional] Then to plot summaries of the pedestal data (frequently useful for diagnosing problems):
idlab@balrog017:~/build/uh-svn-repo/trunk/software/b2l/scripts_dev$ root -l -b -q '../../fe/FEpedsSummary.C+("peds/ped_hslb_s17a")'
root [0] 
Processing ../../fe/FEpedsSummary.C+("peds/ped_hslb_s17a")...
ch =   0   ped =  1792   RMS =   94
ch =   8   ped =  1163   RMS =   46
ch =  16   ped =  1128   RMS =   39
ch =  24   ped =  1086   RMS =   34
ch =  32   ped =   310   RMS =    6
ch =  40   ped =   356   RMS =    8
ch =  48   ped =   322   RMS =    6
ch =  56   ped =   280   RMS =    3
ch =  64   ped =  1075   RMS =   34
ch =  72   ped =  1096   RMS =   73
ch =  80   ped =  1138   RMS =   45
ch =  88   ped =  1052   RMS =   36
ch =  96   ped =   320   RMS =    7
ch = 104   ped =   329   RMS =    9
ch = 112   ped =   388   RMS =    9
ch = 120   ped =   325   RMS =    7
processed 4194304 entries

Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.PedSummary.png has been created
Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.PedSummary_Logy.png has been created
Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.PedVsSample.png has been created
Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.PedVsChannel.png has been created
 FCN=2.10161e+06 FROM MIGRAD    STATUS=CONVERGED     155 CALLS         156 TOTAL
                     EDM=2.30771e-08    STRATEGY= 1  ERROR MATRIX UNCERTAINTY   1.3 per cent
  EXT PARAMETER                                   STEP         FIRST   
  NO.   NAME      VALUE            ERROR          SIZE      DERIVATIVE 
   1  Constant     2.49118e+05   2.95976e+02  -1.60874e-01   1.32447e-06
   2  Mean         3.09614e+01   5.25673e-03  -1.14622e-06  -1.04896e-02
   3  Sigma        4.73722e+00   4.23697e-03  -6.36022e-08   2.33082e+00
Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.RMS_Summary.png has been created
Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.RMS_Summary_Logy.png has been created
Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.PedRMSvsChannel.png has been created
Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.PedRMSvsSample.png has been created
Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.PedRMSvsReadOutPos.png has been created
Info in <TCanvas::Print>: png file peds/ped_hslb_s17a.RMS_ped_depend.png has been created

Note:  If you get a lot of messages like "ERROR:  wrong virtual channel number in data (packet1); DEBUG3:  01 00 00 00" during pedestal readout, it will try again a few times and as long as the script says "Correctly read out 8192.0 packets" before quitting, then all is okay.  It is unknown why this virtual channel problem occurs (it's a bug but I don't know where).

[optional] To view the pedestal summary plots:
eog peds/ped_hslb_s17a*.png

[optional] If you want to save the pedestals for future reference (because they mark the first or last time a particular situation is being exercised):
idlab@balrog017:~/build/uh-svn-repo/trunk/software/b2l/scripts_dev$ ./push_peds.sh 2019-10-04.these-look-nice.c0c2only
2019-10-05+05:32     10069140 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.RMS.txt
2019-10-05+05:32     17044537 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.ped.txt
2019-10-05+05:32     17072128 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.dat
2019-10-05+05:32      8536064 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.ped.dat
2019-10-05+05:32      8536064 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.RMS.dat
2019-10-05+05:35        16009 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.PedSummary.png
2019-10-05+05:35        16983 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.PedSummary_Logy.png
2019-10-05+05:35        19455 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.RMS_Summary_Logy.png
2019-10-05+05:35        21818 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.RMS_Summary.png
2019-10-05+05:35        25792 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.RMS_ped_depend.png
2019-10-05+05:35        31859 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.PedRMSvsChannel.png
2019-10-05+05:35        33339 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.PedRMSvsSample.png
2019-10-05+05:35        34725 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.PedVsChannel.png
2019-10-05+05:35        45609 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.PedRMSvsReadOutPos.png
2019-10-05+05:35        59214 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only/ped_hslb_s17a.PedVsSample.png
2019-10-05+05:37         4096 peds/2019-10-05.2019-10-04.these-look-nice.c0c2only

Note:  If you don't run push_peds.sh to archive the pedestal data and summary plots, the next pedestal acquisition will overwrite them.  Usually they are not needed, as pedestal subtraction is done online before data comes out.

[optional]  To check again on the boardstack temperatures and raw voltages:
idlab@balrog017:~/build/uh-svn-repo/trunk/software/b2l/scripts_dev$ ./get_status.py 0
Writing output from ./get_status.py to logfile: logs/2019-10-05.054118.s17a.SCROD004.get_status.log
SCROD #4 RawVoltages: 1.800 V 3.475 V 4.623 V
 WARNING: RAW2 voltage unnecessarily high (by 0.376 V)
         FPGA_ver ARM_ver  trigMask DieTemp WallTemp -----other------ ARM_stat
   SCROD 00010095 0000006e 00000000  58.0 C  38.8 C  34.5 C   9.4 %RH Running
carrier0 00000062 00000021 00000000  73.2 C  59.5 C  51.8 C  58.5 C   Running
carrier1 00000062 00000021 00000000  73.3 C  60.5 C  53.0 C  59.0 C   Running
carrier2 00000062 00000021 00000000  78.8 C  65.8 C  61.2 C  67.0 C   Running
carrier3 00000062 00000021 00000000  72.9 C  56.8 C  52.0 C  56.2 C   Running
readoutBitSlip (IRSX config?) = [3, 3, 3, 3]
readoutWindows (prep done?)   = [1, 1, 1, 1]
Feature extraction mode       = 2 Passthru
SCROD_AxiCommon_asicTimeoutMask: 0
ProcessPacketProblemCounter = 0
nSamplesWrongCounter = 0
SCROD_PS_EXTENDED_STATUS_ADDR = 0x1
SCROD_PS_pendingWaves = 0
SCROD_PS_procEventCnt = 0
SCROD_PS_totalWaves = 0
SCROD_AxiCommon_eventCnt = 54784
SCROD_AxiCommon_pendingEventCount = 255
SCROD_AxiCommon_maxPendingEventCount = 255
SCROD_PS_AXI_FAULT_STATUS_ADDR = 0x0
SCROD_PS_AXI_FAULT_ADDRESS_ADDR = 0x0
SCROD_PS_OFFENDING_ADDRESS0_ADDR = 0x0
SCROD_PS_OFFENDING_ADDRESS1_ADDR = 0x0

Note:  After configuration, the warnings about raw voltages being too *low* should be heeded (requires a tunnel access with a slotted screwdriver to fix).
  23   Thu Oct 17 08:06:01 2019 M. Andrewdocumentationwhat was brought to KEK (2019-09)

photographic record of equipment delivered to KEK in September

  Draft   Thu Oct 17 09:28:32 2019 M. Andrewdocumentation what was installed for HER (2019-09)
  25   Tue Oct 29 09:27:14 2019 M. Andrewdocumentationinstructions on taking a full revolution of waveforms
This may be useful when steering the sensor into x-ray beam for instance.

First, ensure the boardstack is powered, programmed and configured.

Then, make sure the ".config" file in ~/build/uh-svn-repo/trunk/software/b2l/scripts_dev/ has a line declaring the xrm_mode is "sweep" and plot_continuous is set to 1 and xrm_run_continuous is set to 1:

xrm_run_continuous=1
plot_continuous=1
be_verbose_when_collecting_data=1
xrm_mode="sweep"

After that, to acquire data, simply run ./xrm.py from ~/build/uh-svn-repo/trunk/software/b2l/scripts_dev/ (see attachment for example output).
  26   Wed Oct 30 15:23:57 2019 M. Andrewdocumentationsample waveform files
A sample waveform file from the reference boardstack at UH and the boardstack in the HER at KEK are attached (in tar bzip2 file).

The format of the files is as in the attached spreadsheet (start from cell C29 for the waveform data).

A parser for the data (raw datafiles as well as waveform files) is committed to the UH svn repo (in scripts_dev/) and also attached here.  See the functions events_from_waveformfile() and waveforms_from_waveformfile() for details.
  27   Tue Nov 5 11:47:36 2019 M. Andrewdocumentationinstructions on taking data around a desired RF bucket
This mode of operation is useful when you've located your RF bucket of interest and want to focus on taking data at that position.

First, ensure the boardstack is powered, programmed and configured.

Then, make sure the ".config" file in ~/build/uh-svn-repo/trunk/software/b2l/scripts_dev/ has a line declaring the xrm_mode is "acquire" and plot_continuous is set to 1 and xrm_run_continuous is set to 1:

xrm_run_continuous=1
plot_continuous=1
xrm_mode="acquire"

Choose your bunch marker like so (in the same .config file):

desired_RF_bucket=762
RF_bucket_sample_offset=-1

After that, to acquire data, simply run ./xrm.py from ~/build/uh-svn-repo/trunk/software/b2l/scripts_dev/ (see attachment for example output).
  28   Mon Nov 18 13:30:44 2019 M. Andrewdocumentationfirst light!
A video of a time series of waveforms for first light (recorded 2019-11-15) is posted here:

https://www.youtube.com/watch?v=IVVIYGwrBqI
  29   Mon Nov 18 14:06:31 2019 M. Andrewdocumentationconfig file
Below is a list of all possible config file options that are interpreted/used by the xrm.py code.  The filename is ".config" and it must be located in "${HOME}/build/uh-svn-repo/trunk/software/b2l/scripts_dev/"

For svn checkouts where (re)parsing & (re)plotting data is going to be the only valid operation, be sure to set fake_it="yes" and xrm_mode="parse" among other things (see below).  Please note that the config file parser can't handle spaces between the variable name and the equals sign (also between the equals sign and the value or beginning quote (for strings), so xrm_mode = "parse" won't work but xrm_mode="parse" will.

mode="eth"
local_IP=""
fake_it="yes"
remote_IP="192.168.10.16"
remote_port="8192"
ethernet_device="blah"

# for threshScan1boardstack.py:
maximum_iterations=2000
step_initial_when_reading_from_file=1
step_initial_when_from_seed_value=1
number_of_channels_to_get_before_quitting_threshold_scan=64

# for xrm.py:
xrm_run_continuous=0
plot_continuous=1
show_plot=0
datafilesize=20000000
be_verbose_when_collecting_data=0
use_pedestal_subtraction_mode=1
retake_pedestals_at_every_filechange=0
desired_pause_between_acquisitions=0
should_cycle_slowly_through_bunch_markers=0
desired_RF_bucket=4270
RF_bucket_sample_offset=0
multicast_cal_signal=1
enable_cal_signal=0
should_plot_beam_current=1

sweep_start_bucket=4
#sweep_start_bucket=772 # 64 windows
#sweep_start_bucket=2308

#sweep_end_bucket=772 # 64 windows
#sweep_end_bucket=1540 # 128 windows
#sweep_end_bucket=2308 # 192 windows
#sweep_end_bucket=3076 # 256 windows
#sweep_end_bucket=3844 # 320 windows
#sweep_end_bucket=4612 # 384 windows
sweep_end_bucket=5116 # 426 windows

#xrm_mode="sweep"
#xrm_mode="acquire"
xrm_mode="parse"
  30   Wed Nov 6 13:35:45 2024 M. Andrewdocumentationsample waveform files
Attached is a sample datafile (in raw, root and waveforms formats) showing self-pulser data taken in April 2024, along with the most recent version of the xrm.py script.
  31   Mon Feb 3 08:22:06 2025 M. Andrewdocumentationconfig file
Attached is the updated .config file for 2025.
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